Altera DE0-nano. Struggling to make a SPI slave device. Ask Question Asked 5 years, 11 months ago. Active 5 years, 5 months ago. Viewed 648 times 0. I'm new to VHDL and I thought I could try to make a slave SPI device as training, but it's not working quite as expected. Below my current code. It's compiles and upload just fine, but it's not working as intended. Right now I have the leds ... De0 Nano Bitcoin Mining. April 15, 2018 April 15, 2018 by textbavi1984, posted in best, nano ... I am trying to use the Altera DE0-nano to communication with the PC. I am using the ttl-232R-3v3 cable, currently it transmit 8 bits data once, but with the cable, it can be 1 bit a time transmit. ... Altera. The compile the code on an different Altera device then DE2-115, you need to set the Device to be the correct one. Find the correct fpga package number and add it, for the DE0-Nano this is EP4CE22F17C6. Be sure to select the correct one, because the hardware effects the location of your pins, which you will need in the clock pin step. The Open Source FPGA Bitcoin Miner port for DE0-Nano was created by GitHub user kramble, who has published a repository containing the HDL along with software for use with Raspberry Pi. In order to compile the Verilog design it's necessary to install the Altera Quartus II software (the free-of-charge Web Edition version will suffice).
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